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  rev.1.00 sep 14, 2005 page 1 of 9 m62001l/fp to m62008l/fp low power 2 output system reset ic series rej03d0781-0100 rev.1.00 sep 14, 2005 description the m62001 to m62008 are semiconductor integrated circuits whose optimum use is for the detection of the rise and fall in the power supply to a microcomputer system in order to reset or release the microcomputer system. the m62001 to m62008 carry out voltage detection in two-steps and have two output pins. as bi-cmos process and low power dissipating circuits are employed, they output optimum signals through each output pin to a system that requires ram backup. as output signals, interruption ( int ) and compulsive reset ( reset ) signals are available. the interruption signal ( int ) is used to alter the microcomputer from normal mode to backup mode and vice versa. these output signals are classified into pulse type (m62001 to m62004) and hold type (m62005 to m62008). features ? bi-cmos process realizes a configuratio n of low current dissipating circuits. circuit current i cc = 5 a (typ, normal mode, v cc = 5.0 v) i cc = 1 a (typ, backup mode, v cc = 2.5 v) ? two-step detection of supply voltage detection voltage in normal mode (2 types) v s = 4.45 v/4.25 v (typ) detection voltage in backup mode v batt = 2.15 v (typ) ? two outputs reset output ( reset ): output of compulsive reset signal interruption output ( int ): output of interruption signal ? two types of output forms: cmos and open drain ? two types of interruption output ( int ) signals pulse type (m62001 to m62004) hold type (m62005 to m62008) ? two types of outline packages 5-pin plastic sip (single in-line package) 8-pin plastic sop (mini flat package) ? output based on ram backup mode (see the timing chart) application ? prevention of errors in microcomputer system in electronic equipment that requires ram backup, such as office, industrial, and home-use equipment.
m62001l/fp to m62008l/fp rev.1.00 sep 14, 2005 page 2 of 9 pin arrangement m62001fp to m62008fp 8 5 6 7 int nc nc: no connection nc gnd reset nc v cc cd 1 4 3 2 (top view) package: prsp0008da-a (8p2s-a) package: 5p5t (top view) m62001l to m62008l v cc reset gnd 5 1 2 3 4 int cd block diagram gnd (ground pin) v cc int 3 8 7 + ? cd (pin to delay capacitance) 2 + ? interruption signal generation block rese t 1 reset signal generation block
m62001l/fp to m62008l/fp rev.1.00 sep 14, 2005 page 3 of 9 absolute maximum ratings (ta = 25c, unless otherwise noted) item symbol ratings unit conditions supply voltage v cc 8 v output sink current isink 5 ma power dissipation pd 440 mw thermal derating k 4.4 mw/c ta 25c operating temperature topr ?20 to +75 c storage temperature tstg ?40 to +125 c electrical characteristics (ta = 25c, unless otherwise noted) item symbol min typ max unit test conditions 4.30 4.45 4.60 m62001, m62002, m62005, m62006, supply voltage v s 4.05 4.25 4.45 interruption level during v cc drop (equivalent to v sl ) m62003, m62004, m62007, m62008, battery voltage v batt 2.00 2.15 2.30 v reset level at backup hysteresis voltage ? v s ? 100 ? mv ? v s = v sh ? v sl ? 5.0 20 v cc = 5.0v: in normal mode circuit current i cc ? 1.0 4 a v cc = 2.5v: in backup mode sink ability vsat1 ? 0.2 0.4 v cc = 4v, i o = 4ma (output saturation voltage of n-ch transistor) source ability vsat2 ? 0.2 0.4 v v cc = 4v, i o = 1ma (output saturation voltage of p-ch transistor) [cmos output] m62001, m62003, m62005, m62007 delay time t d ? 50 ? ms external capacitance cd = 0.33 f pulse width t pw ? 7 10 s output pulse width (m62001, m62002, m62003, m62004) reset output response time t reset ? 30 ? s time between v cc (when falling) = v batt and output of reset signal interruption output reset time t int ? 100 ? s time between v cc (when falling) = v s and output of int signal summary of m62001l/fp to m62008l/fp type no. supply voltage detection level v s (v) battery voltage detection level v batt (v) output form interruption signal output mode m62001l/fp cmos m62002l/fp 4.45 open drain m62003l/fp cmos m62004l/fp 4.25 open drain pulse output m62005l/fp cmos m62006l/fp 4.45 open drain m62007l/fp cmos m62008l/fp 4.25 2.15 open drain hold output
m62001l/fp to m62008l/fp rev.1.00 sep 14, 2005 page 4 of 9 typical characteristics circuit curent vs. supply voltage 10 0 0246810 4 8 2 6 circuit curent i cc ( a) 2.0 0 0.5 1.5 1.0 supply voltage v cc (v) supply voltage v cc (v) 00.5 2.0 1.0 1.5 limit operating voltage (open drain type) output voltage v out (v) thermal derating (maximum rating) ambient temperature ta (c) power dissipation pd (mw) 1000 0 0 25 50 75 100 125 200 400 600 800 delay capacitance vs. delay time delay capacitance c ( f) 1 10 100 1000 delay time t d (ms) 10 0.01 1.0 0.1 reset output voltage vs. supply voltage interruption output voltage vs. supply voltage 5 0 0123 v batt v sh 45 2 4 1 3 reset output voltage v reset (v) supply voltage v cc (v) uncertain area 5 0 0123 v sh v sl 45 2 4 1 3 interruption output voltage v int (v) supply voltage v cc (v) r l = 10k ? r l = 100k ? r l = 1m ? uncertain area
m62001l/fp to m62008l/fp rev.1.00 sep 14, 2005 page 5 of 9 circuit current vs. ambient temperature 7 0 2 5 1 3 6 4 circuit current i cc ( a) detection voltage vs. ambient temperature (battery voltage) ambient temperature ta (c) detection voltage v batt (v) 2.20 2.05 2.10 2.15 nch output saturation voltage vs. output sink current pch output saturation voltage vs. output source current output saturation voltage vsat (v) output saturation voltage vsat (v) output sink current isink (ma) ambient temperature ta (c) ?40 0 ?20 20 40 80 60 100 ?40 0 ?20 20 40 80 60 100 v cc = 5v v cc = 3v v cc = 2v detection voltage vs. ambient temperature (detection at 4.45v type) ambient temperature ta (c) detection voltage v s (v) 4.50 4.35 4.40 4.45 ?40 0 ?20 20 40 80 60 100 detection voltage vs. ambient temperature (detection at 4.25v type) ambient temperature ta (c) detection voltage v s (v) 4.30 4.15 4.20 4.25 ?40 0 ?20 20 40 80 60 100 0.5 0 012345 0.2 0.4 0.1 0.3 v cc = 4v output source current isource (ma) 1.0 0 012345 0.4 0.8 0.2 0.6 v cc = 5 4v res int v vsat v cc gnd isink res v vsat v cc gnd isource
m62001l/fp to m62008l/fp rev.1.00 sep 14, 2005 page 6 of 9 operating principle description in general, the memory backup function of a microcomputer, as shown in figure 1, uses two diodes to switch between main power supply and backup power supply. the m62001 to m62008 are ics that, in such memory backup operation, monitor in two steps each voltage on the v dd line. v cc v dd int reset microcompute r system main power supply backup power supply int reset m62001 figure 1 the ics have an intelligent sequence such as substantial hysteresis action of reset toward normal state at restoration of supply voltage, as well as two-step detection in low power dissipation mode. detailed description 1. two-step detection the ics perform two-step detection of supply voltage and have two output pins ( int and reset ). although they have two comparators for two-step detection, they differ significantly from such that are simply provided with independent detectors, because the reset output signal is dependent at power-up and the like upon the int output signal. 2. int output (detection of 4.45 v and 4.25 v) the int output at the power-up of supply voltage detects v sh (4.45 v/4.25 v) to inform the microcomputer system of the fact that the supply voltage has reached its normal level. when the supply voltage drops from its normal level to v sl (4.45 v/4.25 v) an interruption signal is output to alter the microcomputer system into ram backup mode. the microcomputer at this point enters sleep state and secures memory by a stop command issued by the interruption signal. these detection voltage, v sh the rise, and v sl the fall, of supply voltage, have a 100 mv hysteresis voltage between themselves. v sh ? v sl 100 (mv) int output voltage vs. supply voltage 5 0 4.04.24.44.64.85.0 2 4 1 3 int output voltage [hold type] (v) supply voltage v cc (v) v sh v sl figure 2 int output (detection of 4.45 v and 4.25 v)
m62001l/fp to m62008l/fp rev.1.00 sep 14, 2005 page 7 of 9 3. reset output (detection of 2.15 v) the reset outputs a signal to prevent the microcomputer from malfunctioning due to a drop in supply voltage. when powering up, reset is kept at low level until the supply voltage reaches v sh . if the supply voltage rises to v sh , reset is set to high level. by inserting a capacitor between the cd pin and gnd, it is possible to produce a desired delay time (t d ). to set a delay time, equation below is used. t d 1.52 10 5 c (s) once the supply voltage has exceeded v sh and the reset output is set to high level, reset maintains the high level until the supply voltage drops to v batt . when the supply voltage drops to v batt , reset goes low thereby resetting and initializing the microcomputer. the reset output has a large hysteresis voltage of approximately 2 v between the rise in supply voltage at power- up and its fall. reset output voltage vs. supply voltage 5 0 2345 2 4 1 3 reset output voltage (v) supply voltage v cc (v) v sh v batt figure 3 reset output (detection of 2.15 v)
m62001l/fp to m62008l/fp rev.1.00 sep 14, 2005 page 8 of 9 operating description gnd (2) (3) (4) (5) (6) (7)(8) (9) (10) (1) if v cc rises to v sh (4.55v, 4.35v), the int output is set to high level. *1. a pulse is output if int is of pulse output type. reset goes high t d (s) after v sh . *1. t d 1.52 10 5 c (s) if v cc drops to v sl (4.45v, 4.25v), int goes low. *1. a pulse is output if int is of pulse output type. *2. the reset output continues to be held high. (1): (2): (3): if v cc returns to v sh , the int output is set to high level. same as (3). if v cc becomes lower than v batt (2.15v), the reset output is set to low thereby resetting the microcomputer and initializing system. same as (1). same as (2). same as (3) and (5). same as (6). (4): (5): (6): (7): (8): (9): (10): v sh v sh v sh v sh v sl v sl v sl v batt v batt v sl t d t d v cc gnd uncertain area int (hold output type) gnd uncertain area uncertain area int (pulse output type) gnd reset pulse width 7 s figure 4 operating waveform application example v cc v dd power supply pin + ? microcomputer system m6200x + ? microcomputer system reset ic cd 0.33 f 100 f smoothing capacitor delay capacitor + int reset int interruption input reset reset input clock input/output int (interruption reset signal) *note *note reset (compulsive reset signal) backup power supply v batt (+3v) power supply v cc (+5v) note: a pull-up resistor is required only in the case of open-drain output. figure 5 application example
m62001l/fp to m62008l/fp rev.1.00 sep 14, 2005 page 9 of 9 package dimensions sip5-p-240-2.54 weight(g) ? jedec code eiaj package code lead material cu alloy 0.22 5p5t plastic 5pin 240mil sip ? ? ? ? ? 4.0 ? 11.9 11.5 symbol min nom max a a 2 b 1 b b 2 c d e e 1 l dimension in millimeters a 1 3.0 2.54 0.8 0.7 0.6 2.17 1.97 1.77 11.7 0.34 0.27 0.22 1.15 0.85 0.75 1.5 1.2 1.1 0.6 0.5 0.4 1.4 6.1 e ? ? ? ? d e a 2 a 1 a l e 1 c b 2 b 1 b e seating plane 1 5 2. 1. dimensions "*1" and "*2" do not include mold flash. note) dimension "*3" does not include trim offset. b p a 1 h e y0.1 e 1.27 c 0 10 l0.20.40.6 0.05 a1.9 5.9 6.2 6.5 a 2 1.5 e4.24.44.6 d4.85.05.2 reference symbol dimension in millimeters min nom max 0.35 0.4 0.5 0.13 0.15 0.2 p-sop8-4.4x5-1.27 0.07g mass[typ.] 8p2s-a prsp0008da-a renesas code jeita package code previous code 1.12 1.42 detail f l a 1 a 2 f *1 *2 *3 85 4 1 index mark y b p e a c e h e d
keep safety first in your circuit designs! 1. renesas technology corp. puts the maximum effort into making semiconductor products better and more reliable, but there is a lways the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placeme nt of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies o r errors. please also pay attention to information published by renesas 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